P8 in Altera 10K40 FPGA

Adapted from Dr. C.H. Ting's More on Forth Engines Vol. 24, Nov 1999

The most significant change is swapping the mulitplexer inputs at P Mux so the PSEL coding is positive logic.

Altera Design

Instruction Set and control functions

Instruction Coding

Control Function Table

Schematic for test circuit

PCB component locator for test circuit

Work to be done:

• Implement instruction decode and control as HDL
• Eliminate global CLOCK & HCLOCK (Asynchronous implementation)